1. Field of the Invention
The present invention is related to an integrated semiconductor device having a trench for electrically separating a plurality of semiconductor elements, and a method of manufacturing the same.
2. Description of the Related Art
Forming a dielectrically isolated integrated circuit with an SOI (Silicon on Insulator) is known, for example, in Japanese Laid Open Patent 2007-258501 (Patent Document 1). When forming this type of integrated circuit, first, as is shown in FIG. 1, an SOI wafer comprised of a silicon substrate 1, a first insulation film 2 comprised from a silicon oxide film and a silicon semiconductor layer 3 is prepared. Following this, a trench (channel) 5 is formed by anisotropically etching (dry etching) the silicon semiconductor layer 3 using a resist mask 4. In this way, the silicon semiconductor layer 3 is separated into a plurality of component areas 6 by the trench 5. Because the trench 5 is formed to extend from the surface of the silicon semiconductor layer 3 to the first insulation film 2, the plurality of component areas 6 are mutually and electrically isolated by the first insulation film 2 and the trench 5.
The first insulation film 2 is exposed at the bottom of the trench 5 when the silicon semiconductor layer 3 is etched so that the trench 5 extends completely to the first insulation film 2. Conventionally, in order to ensure dielectric isolation between the plurality of component areas 6 by the trench 5, the etching process is performed sufficiently so that the silicon semiconductor layer 3 does not remain at the bottom of the trench 5. At the time of this etching process, because selectivity between the first insulation film 2 and the silicon semiconductor layer 3 is high and because the silicon semiconductor layer 3 is easily etched via the first insulation film 2,
When etching reaches the first insulation film 2, etching progresses in a horizontal direction at the bottom of the trench 5, and the bottom surface of the silicon semiconductor layer 3 is cut away in a horizontal direction, that is, a notch 7 is produced.
In the state before a second insulation film (silicon oxide film) 8 is formed in the trench 5 shown in FIG. 1, characteristic degradation of the component areas 6 does not substantially occur. However, as is shown in FIG. 2, for example, when the second insulation film 8 comprised from a silicon oxide material is formed, oxygen is supplied to the notch 7 during the formation process of this second insulation film 8, and a silicon oxide film is also formed within this notch 7. Crystal defects are produced by the stress caused by the component areas 6 being raised by the silicon oxide film, causing degradation in the electrical characteristics of the components. Furthermore, in FIG. 2, phosphorus ions are implanted into the side wall of the trench 5 as n type impurities, and after this, the second insulation film 8 comprised from a silicon oxide material is formed by performing a high temperature thermal oxidation process on the silicon semiconductor layer 3. An n type semiconductor region 9 is then formed based on the phosphorus ions implanted within the component area 6.
When a V shaped cross section notch 7 is formed as is shown in FIG. 1 and FIG. 2, as well as the production of crystal defects in the component area 6, resistance decreases in the components due to thinning of the second insulation film 8 in part of the notch 7. In addition, an electrode formed from conductive poly-crystal silicon is buried within the trench 5 via the second insulation film 8 and a voltage is sometimes applied between this electrode and the component area 6. In this case, a leak current flows through the second insulation film 8 due to a concentration of an electrical field at the sharp angle part at the entrance of the notch 7. This decrease in the resistance of components and increase in leak current degrades the functions of the semiconductor device.
Therefore, the problems that the present invention attempts to solve is as follows: in a manufacturing method of an integrated semiconductor device where a trench for dielectrically isolation is formed on a wafer stacked with a substrate, insulation film and semiconductor layer, crystal degradation of a semiconductor layer is produced due to forming an insulation film within the trench. In addition, another problem the present invention attempts to solve is that in an integrated semiconductor device which has the above stated trench, a decrease in resistance and an increase in a leak current are produced at the bottom part of the trench.